// -*- mode:c++ -*-
//
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//
// Date: Dec. 2009
// Authors: Gou Pengfei

output header {{
	class GOp:public TRIPSStaticInst
	{
		protected:

		/// Predication bits
		uint8_t pr;

		/// Constructors for TRIPS G format instructions
		GOp(const char* mnem, MachInst _machInst, OpClass __opClass):
			TRIPSStaticInst(mnem, _machInst, __opClass),pr(PR)
		{
                    switch(pr){
                        case 0x0:_predication = Disable;break;
                        case 0x2:_predication = PredUponFalse;break;
                        case 0x3:_predication = PredUponTrue;break;
                        default: _predication = Reserved; 
			}
		}
		
		std::string generateDisassembly(Addr pc, const SymbolTable *symTab) const;
	};

}};

output decoder {{
	std::string GOp::generateDisassembly(Addr pc, const SymbolTable* symtab) const {
		std::stringstream ss;
		ccprintf(ss, "%-10s",mnemonic);
		ss<<"";
		ccprintf(ss, "PR[%d]", pr);
		ss<<",";
		printConsumer(ss, 0);
		printConsumer(ss, 1);
		return ss.str();
	}
}};

def format GOp(code,*opt_flags) {{

	#
	# The following opt_flags is necessary for TRIPS ISA among which 
	# 'IQOPerands' indicates the operands come from IQ rather than global regs,
	# 'IsEDGE' indicates this is an instruction format for EDGE CPU model, 
	# and finally the dictionary structure indicates how many consumers this 
	# instruction format has.
	#
	# Caution: the dictionary struction must be put in the last of this opt_flags,
	# if not, problems will be invoked from the isa_parser.py.
	# 
	# If you do have questions about how this works, come and have a conversion with me.
	# I'm Gou Pengfei, by the way.
	#

	opt_flags+=('IQOPerands','IsEDGE',{'numConsumer':2},)
	iop = InstObjParams(name,Name,'GOp',code,opt_flags)
	header_output = BasicDeclare.subst(iop)
	decoder_output = BasicConstructor.subst(iop)
	decode_block = BasicDecode.subst(iop)
	exec_output = BasicExecute.subst(iop)
}};
